A Compact Device Model for a Piezoelectric Nano-Transistor

Original: https://doi.org/10.3390/mi16020114

A simple “compact model” was developed to quickly estimate the performance of tiny electronic devices, like nano-sized piezoelectronic transistors. This model is useful for getting a rough idea of how devices might behave without running complex simulations.

The compact model was checked by comparing it with accurate finite element analysis (FEA), which simulates the devices in detail using special boundary and interface conditions. For a radio-frequency (RF) switch and a small VLSI device, the model predictions matched the FEA very closely—differences were tiny, around 0.01% for the RF switch and 0.001% for the VLSI device. This shows that both the material properties and geometry were correctly represented in the models.

Next, the model was tested under more realistic conditions, where layers are perfectly bonded, causing complex deformations (bending and edge effects). For the RF switch, the compact model still matched the FEA fairly well, as long as the piezoelectric layer wasn’t too thick, meaning it can be used to narrow down design options.

However, for the VLSI device, the compact model was less accurate under these realistic conditions, so precise FEA simulations are necessary for reliable results.